RP2040_SVD.IO_QSPI

Entities

Simple Types

• GPIO_QSPI_SCLK_CTRL_FUNCSEL_Field
• GPIO_QSPI_SCLK_CTRL_INOVER_Field
• GPIO_QSPI_SCLK_CTRL_IRQOVER_Field
• GPIO_QSPI_SCLK_CTRL_OEOVER_Field
• GPIO_QSPI_SCLK_CTRL_OUTOVER_Field
• GPIO_QSPI_SD0_CTRL_FUNCSEL_Field
• GPIO_QSPI_SD0_CTRL_INOVER_Field
• GPIO_QSPI_SD0_CTRL_IRQOVER_Field
• GPIO_QSPI_SD0_CTRL_OEOVER_Field
• GPIO_QSPI_SD0_CTRL_OUTOVER_Field
• GPIO_QSPI_SD1_CTRL_FUNCSEL_Field
• GPIO_QSPI_SD1_CTRL_INOVER_Field
• GPIO_QSPI_SD1_CTRL_IRQOVER_Field
• GPIO_QSPI_SD1_CTRL_OEOVER_Field
• GPIO_QSPI_SD1_CTRL_OUTOVER_Field
• GPIO_QSPI_SD2_CTRL_FUNCSEL_Field
• GPIO_QSPI_SD2_CTRL_INOVER_Field
• GPIO_QSPI_SD2_CTRL_IRQOVER_Field
• GPIO_QSPI_SD2_CTRL_OEOVER_Field
• GPIO_QSPI_SD2_CTRL_OUTOVER_Field
• GPIO_QSPI_SD3_CTRL_FUNCSEL_Field
• GPIO_QSPI_SD3_CTRL_INOVER_Field
• GPIO_QSPI_SD3_CTRL_IRQOVER_Field
• GPIO_QSPI_SD3_CTRL_OEOVER_Field
• GPIO_QSPI_SD3_CTRL_OUTOVER_Field
• GPIO_QSPI_SS_CTRL_FUNCSEL_Field
• GPIO_QSPI_SS_CTRL_INOVER_Field
• GPIO_QSPI_SS_CTRL_IRQOVER_Field
• GPIO_QSPI_SS_CTRL_OEOVER_Field
• GPIO_QSPI_SS_CTRL_OUTOVER_Field

Record Types

• DORMANT_WAKE_INTE_Register
• DORMANT_WAKE_INTF_Register
• DORMANT_WAKE_INTS_Register
• GPIO_QSPI_SCLK_CTRL_Register
• GPIO_QSPI_SCLK_STATUS_Register
• GPIO_QSPI_SD0_CTRL_Register
• GPIO_QSPI_SD0_STATUS_Register
• GPIO_QSPI_SD1_CTRL_Register
• GPIO_QSPI_SD1_STATUS_Register
• GPIO_QSPI_SD2_CTRL_Register
• GPIO_QSPI_SD2_STATUS_Register
• GPIO_QSPI_SD3_CTRL_Register
• GPIO_QSPI_SD3_STATUS_Register
• GPIO_QSPI_SS_CTRL_Register
• GPIO_QSPI_SS_STATUS_Register
• INTR_Register
• IO_QSPI_Peripheral
• PROC0_INTE_Register
• PROC0_INTF_Register
• PROC0_INTS_Register
• PROC1_INTE_Register
• PROC1_INTF_Register
• PROC1_INTS_Register

Variables

• IO_QSPI_Periph

Description

------------- Registers -- -------------

DORMANT_WAKE_INTE_Register

type DORMANT_WAKE_INTE_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

DORMANT_WAKE_INTF_Register

type DORMANT_WAKE_INTF_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

DORMANT_WAKE_INTS_Register

type DORMANT_WAKE_INTS_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean;
   Reserved_24_31            : HAL.UInt8;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

GPIO_QSPI_SCLK_CTRL_FUNCSEL_Field

type GPIO_QSPI_SCLK_CTRL_FUNCSEL_Field is
  (xip_sclk,
   sio_30,
   null_k)
  with Size => 5;

Enumeration Literal

xip_sclk

sio_30

null_k

GPIO_QSPI_SCLK_CTRL_INOVER_Field

type GPIO_QSPI_SCLK_CTRL_INOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the peri input

INVERT

drive peri input low

LOW

drive peri input high

HIGH

GPIO_QSPI_SCLK_CTRL_IRQOVER_Field

type GPIO_QSPI_SCLK_CTRL_IRQOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the interrupt

INVERT

drive interrupt low

LOW

drive interrupt high

HIGH

GPIO_QSPI_SCLK_CTRL_OEOVER_Field

type GPIO_QSPI_SCLK_CTRL_OEOVER_Field is
   NORMAL,
   INVERT,
   DISABLE,
   ENABLE)
  with Size => 2;

Enumeration Literal

NORMAL

drive output enable from inverse of peripheral signal selected by funcsel

INVERT

disable output

DISABLE

enable output

ENABLE

GPIO_QSPI_SCLK_CTRL_OUTOVER_Field

type GPIO_QSPI_SCLK_CTRL_OUTOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

drive output from inverse of peripheral signal selected by funcsel

INVERT

drive output low

LOW

drive output high

HIGH

GPIO_QSPI_SCLK_CTRL_Register

type GPIO_QSPI_SCLK_CTRL_Register is record
   FUNCSEL        : GPIO_QSPI_SCLK_CTRL_FUNCSEL_Field :=
                     RP2040_SVD.IO_QSPI.null_k;
   Reserved_5_7   : HAL.UInt3 := 16#0#;
   OUTOVER        : GPIO_QSPI_SCLK_CTRL_OUTOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_10_11 : HAL.UInt2 := 16#0#;
   OEOVER         : GPIO_QSPI_SCLK_CTRL_OEOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_14_15 : HAL.UInt2 := 16#0#;
   INOVER         : GPIO_QSPI_SCLK_CTRL_INOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_18_27 : HAL.UInt10 := 16#0#;
   IRQOVER        : GPIO_QSPI_SCLK_CTRL_IRQOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_30_31 : HAL.UInt2 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

FUNCSEL

Reserved_5_7

OUTOVER

Reserved_10_11

OEOVER

Reserved_14_15

INOVER

Reserved_18_27

IRQOVER

Reserved_30_31

GPIO_QSPI_SCLK_STATUS_Register

type GPIO_QSPI_SCLK_STATUS_Register is record
   Reserved_0_7   : HAL.UInt8;
   OUTFROMPERI    : Boolean;
   OUTTOPAD       : Boolean;
   Reserved_10_11 : HAL.UInt2;
   OEFROMPERI     : Boolean;
   OETOPAD        : Boolean;
   Reserved_14_16 : HAL.UInt3;
   INFROMPAD      : Boolean;
   Reserved_18_18 : HAL.Bit;
   INTOPERI       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   IRQFROMPAD     : Boolean;
   Reserved_25_25 : HAL.Bit;
   IRQTOPROC      : Boolean;
   Reserved_27_31 : HAL.UInt5;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

Reserved_0_7

OUTFROMPERI

OUTTOPAD

Reserved_10_11

OEFROMPERI

OETOPAD

Reserved_14_16

INFROMPAD

Reserved_18_18

INTOPERI

Reserved_20_23

IRQFROMPAD

Reserved_25_25

IRQTOPROC

Reserved_27_31

GPIO_QSPI_SD0_CTRL_FUNCSEL_Field

type GPIO_QSPI_SD0_CTRL_FUNCSEL_Field is
  (xip_sd0,
   sio_32,
   null_k)
  with Size => 5;

Enumeration Literal

xip_sd0

sio_32

null_k

GPIO_QSPI_SD0_CTRL_INOVER_Field

type GPIO_QSPI_SD0_CTRL_INOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the peri input

INVERT

drive peri input low

LOW

drive peri input high

HIGH

GPIO_QSPI_SD0_CTRL_IRQOVER_Field

type GPIO_QSPI_SD0_CTRL_IRQOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the interrupt

INVERT

drive interrupt low

LOW

drive interrupt high

HIGH

GPIO_QSPI_SD0_CTRL_OEOVER_Field

type GPIO_QSPI_SD0_CTRL_OEOVER_Field is
   NORMAL,
   INVERT,
   DISABLE,
   ENABLE)
  with Size => 2;

Enumeration Literal

NORMAL

drive output enable from inverse of peripheral signal selected by funcsel

INVERT

disable output

DISABLE

enable output

ENABLE

GPIO_QSPI_SD0_CTRL_OUTOVER_Field

type GPIO_QSPI_SD0_CTRL_OUTOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

drive output from inverse of peripheral signal selected by funcsel

INVERT

drive output low

LOW

drive output high

HIGH

GPIO_QSPI_SD0_CTRL_Register

type GPIO_QSPI_SD0_CTRL_Register is record
   FUNCSEL        : GPIO_QSPI_SD0_CTRL_FUNCSEL_Field :=
                     RP2040_SVD.IO_QSPI.null_k;
   Reserved_5_7   : HAL.UInt3 := 16#0#;
   OUTOVER        : GPIO_QSPI_SD0_CTRL_OUTOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_10_11 : HAL.UInt2 := 16#0#;
   OEOVER         : GPIO_QSPI_SD0_CTRL_OEOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_14_15 : HAL.UInt2 := 16#0#;
   INOVER         : GPIO_QSPI_SD0_CTRL_INOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_18_27 : HAL.UInt10 := 16#0#;
   IRQOVER        : GPIO_QSPI_SD0_CTRL_IRQOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_30_31 : HAL.UInt2 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

FUNCSEL

Reserved_5_7

OUTOVER

Reserved_10_11

OEOVER

Reserved_14_15

INOVER

Reserved_18_27

IRQOVER

Reserved_30_31

GPIO_QSPI_SD0_STATUS_Register

type GPIO_QSPI_SD0_STATUS_Register is record
   Reserved_0_7   : HAL.UInt8;
   OUTFROMPERI    : Boolean;
   OUTTOPAD       : Boolean;
   Reserved_10_11 : HAL.UInt2;
   OEFROMPERI     : Boolean;
   OETOPAD        : Boolean;
   Reserved_14_16 : HAL.UInt3;
   INFROMPAD      : Boolean;
   Reserved_18_18 : HAL.Bit;
   INTOPERI       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   IRQFROMPAD     : Boolean;
   Reserved_25_25 : HAL.Bit;
   IRQTOPROC      : Boolean;
   Reserved_27_31 : HAL.UInt5;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

Reserved_0_7

OUTFROMPERI

OUTTOPAD

Reserved_10_11

OEFROMPERI

OETOPAD

Reserved_14_16

INFROMPAD

Reserved_18_18

INTOPERI

Reserved_20_23

IRQFROMPAD

Reserved_25_25

IRQTOPROC

Reserved_27_31

GPIO_QSPI_SD1_CTRL_FUNCSEL_Field

type GPIO_QSPI_SD1_CTRL_FUNCSEL_Field is
  (xip_sd1,
   sio_33,
   null_k)
  with Size => 5;

Enumeration Literal

xip_sd1

sio_33

null_k

GPIO_QSPI_SD1_CTRL_INOVER_Field

type GPIO_QSPI_SD1_CTRL_INOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the peri input

INVERT

drive peri input low

LOW

drive peri input high

HIGH

GPIO_QSPI_SD1_CTRL_IRQOVER_Field

type GPIO_QSPI_SD1_CTRL_IRQOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the interrupt

INVERT

drive interrupt low

LOW

drive interrupt high

HIGH

GPIO_QSPI_SD1_CTRL_OEOVER_Field

type GPIO_QSPI_SD1_CTRL_OEOVER_Field is
   NORMAL,
   INVERT,
   DISABLE,
   ENABLE)
  with Size => 2;

Enumeration Literal

NORMAL

drive output enable from inverse of peripheral signal selected by funcsel

INVERT

disable output

DISABLE

enable output

ENABLE

GPIO_QSPI_SD1_CTRL_OUTOVER_Field

type GPIO_QSPI_SD1_CTRL_OUTOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

drive output from inverse of peripheral signal selected by funcsel

INVERT

drive output low

LOW

drive output high

HIGH

GPIO_QSPI_SD1_CTRL_Register

type GPIO_QSPI_SD1_CTRL_Register is record
   FUNCSEL        : GPIO_QSPI_SD1_CTRL_FUNCSEL_Field :=
                     RP2040_SVD.IO_QSPI.null_k;
   Reserved_5_7   : HAL.UInt3 := 16#0#;
   OUTOVER        : GPIO_QSPI_SD1_CTRL_OUTOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_10_11 : HAL.UInt2 := 16#0#;
   OEOVER         : GPIO_QSPI_SD1_CTRL_OEOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_14_15 : HAL.UInt2 := 16#0#;
   INOVER         : GPIO_QSPI_SD1_CTRL_INOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_18_27 : HAL.UInt10 := 16#0#;
   IRQOVER        : GPIO_QSPI_SD1_CTRL_IRQOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_30_31 : HAL.UInt2 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

FUNCSEL

Reserved_5_7

OUTOVER

Reserved_10_11

OEOVER

Reserved_14_15

INOVER

Reserved_18_27

IRQOVER

Reserved_30_31

GPIO_QSPI_SD1_STATUS_Register

type GPIO_QSPI_SD1_STATUS_Register is record
   Reserved_0_7   : HAL.UInt8;
   OUTFROMPERI    : Boolean;
   OUTTOPAD       : Boolean;
   Reserved_10_11 : HAL.UInt2;
   OEFROMPERI     : Boolean;
   OETOPAD        : Boolean;
   Reserved_14_16 : HAL.UInt3;
   INFROMPAD      : Boolean;
   Reserved_18_18 : HAL.Bit;
   INTOPERI       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   IRQFROMPAD     : Boolean;
   Reserved_25_25 : HAL.Bit;
   IRQTOPROC      : Boolean;
   Reserved_27_31 : HAL.UInt5;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

Reserved_0_7

OUTFROMPERI

OUTTOPAD

Reserved_10_11

OEFROMPERI

OETOPAD

Reserved_14_16

INFROMPAD

Reserved_18_18

INTOPERI

Reserved_20_23

IRQFROMPAD

Reserved_25_25

IRQTOPROC

Reserved_27_31

GPIO_QSPI_SD2_CTRL_FUNCSEL_Field

type GPIO_QSPI_SD2_CTRL_FUNCSEL_Field is
  (xip_sd2,
   sio_34,
   null_k)
  with Size => 5;

Enumeration Literal

xip_sd2

sio_34

null_k

GPIO_QSPI_SD2_CTRL_INOVER_Field

type GPIO_QSPI_SD2_CTRL_INOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the peri input

INVERT

drive peri input low

LOW

drive peri input high

HIGH

GPIO_QSPI_SD2_CTRL_IRQOVER_Field

type GPIO_QSPI_SD2_CTRL_IRQOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the interrupt

INVERT

drive interrupt low

LOW

drive interrupt high

HIGH

GPIO_QSPI_SD2_CTRL_OEOVER_Field

type GPIO_QSPI_SD2_CTRL_OEOVER_Field is
   NORMAL,
   INVERT,
   DISABLE,
   ENABLE)
  with Size => 2;

Enumeration Literal

NORMAL

drive output enable from inverse of peripheral signal selected by funcsel

INVERT

disable output

DISABLE

enable output

ENABLE

GPIO_QSPI_SD2_CTRL_OUTOVER_Field

type GPIO_QSPI_SD2_CTRL_OUTOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

drive output from inverse of peripheral signal selected by funcsel

INVERT

drive output low

LOW

drive output high

HIGH

GPIO_QSPI_SD2_CTRL_Register

type GPIO_QSPI_SD2_CTRL_Register is record
   FUNCSEL        : GPIO_QSPI_SD2_CTRL_FUNCSEL_Field :=
                     RP2040_SVD.IO_QSPI.null_k;
   Reserved_5_7   : HAL.UInt3 := 16#0#;
   OUTOVER        : GPIO_QSPI_SD2_CTRL_OUTOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_10_11 : HAL.UInt2 := 16#0#;
   OEOVER         : GPIO_QSPI_SD2_CTRL_OEOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_14_15 : HAL.UInt2 := 16#0#;
   INOVER         : GPIO_QSPI_SD2_CTRL_INOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_18_27 : HAL.UInt10 := 16#0#;
   IRQOVER        : GPIO_QSPI_SD2_CTRL_IRQOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_30_31 : HAL.UInt2 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

FUNCSEL

Reserved_5_7

OUTOVER

Reserved_10_11

OEOVER

Reserved_14_15

INOVER

Reserved_18_27

IRQOVER

Reserved_30_31

GPIO_QSPI_SD2_STATUS_Register

type GPIO_QSPI_SD2_STATUS_Register is record
   Reserved_0_7   : HAL.UInt8;
   OUTFROMPERI    : Boolean;
   OUTTOPAD       : Boolean;
   Reserved_10_11 : HAL.UInt2;
   OEFROMPERI     : Boolean;
   OETOPAD        : Boolean;
   Reserved_14_16 : HAL.UInt3;
   INFROMPAD      : Boolean;
   Reserved_18_18 : HAL.Bit;
   INTOPERI       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   IRQFROMPAD     : Boolean;
   Reserved_25_25 : HAL.Bit;
   IRQTOPROC      : Boolean;
   Reserved_27_31 : HAL.UInt5;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

Reserved_0_7

OUTFROMPERI

OUTTOPAD

Reserved_10_11

OEFROMPERI

OETOPAD

Reserved_14_16

INFROMPAD

Reserved_18_18

INTOPERI

Reserved_20_23

IRQFROMPAD

Reserved_25_25

IRQTOPROC

Reserved_27_31

GPIO_QSPI_SD3_CTRL_FUNCSEL_Field

type GPIO_QSPI_SD3_CTRL_FUNCSEL_Field is
  (xip_sd3,
   sio_35,
   null_k)
  with Size => 5;

Enumeration Literal

xip_sd3

sio_35

null_k

GPIO_QSPI_SD3_CTRL_INOVER_Field

type GPIO_QSPI_SD3_CTRL_INOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the peri input

INVERT

drive peri input low

LOW

drive peri input high

HIGH

GPIO_QSPI_SD3_CTRL_IRQOVER_Field

type GPIO_QSPI_SD3_CTRL_IRQOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the interrupt

INVERT

drive interrupt low

LOW

drive interrupt high

HIGH

GPIO_QSPI_SD3_CTRL_OEOVER_Field

type GPIO_QSPI_SD3_CTRL_OEOVER_Field is
   NORMAL,
   INVERT,
   DISABLE,
   ENABLE)
  with Size => 2;

Enumeration Literal

NORMAL

drive output enable from inverse of peripheral signal selected by funcsel

INVERT

disable output

DISABLE

enable output

ENABLE

GPIO_QSPI_SD3_CTRL_OUTOVER_Field

type GPIO_QSPI_SD3_CTRL_OUTOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

drive output from inverse of peripheral signal selected by funcsel

INVERT

drive output low

LOW

drive output high

HIGH

GPIO_QSPI_SD3_CTRL_Register

type GPIO_QSPI_SD3_CTRL_Register is record
   FUNCSEL        : GPIO_QSPI_SD3_CTRL_FUNCSEL_Field :=
                     RP2040_SVD.IO_QSPI.null_k;
   Reserved_5_7   : HAL.UInt3 := 16#0#;
   OUTOVER        : GPIO_QSPI_SD3_CTRL_OUTOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_10_11 : HAL.UInt2 := 16#0#;
   OEOVER         : GPIO_QSPI_SD3_CTRL_OEOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_14_15 : HAL.UInt2 := 16#0#;
   INOVER         : GPIO_QSPI_SD3_CTRL_INOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_18_27 : HAL.UInt10 := 16#0#;
   IRQOVER        : GPIO_QSPI_SD3_CTRL_IRQOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_30_31 : HAL.UInt2 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

FUNCSEL

Reserved_5_7

OUTOVER

Reserved_10_11

OEOVER

Reserved_14_15

INOVER

Reserved_18_27

IRQOVER

Reserved_30_31

GPIO_QSPI_SD3_STATUS_Register

type GPIO_QSPI_SD3_STATUS_Register is record
   Reserved_0_7   : HAL.UInt8;
   OUTFROMPERI    : Boolean;
   OUTTOPAD       : Boolean;
   Reserved_10_11 : HAL.UInt2;
   OEFROMPERI     : Boolean;
   OETOPAD        : Boolean;
   Reserved_14_16 : HAL.UInt3;
   INFROMPAD      : Boolean;
   Reserved_18_18 : HAL.Bit;
   INTOPERI       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   IRQFROMPAD     : Boolean;
   Reserved_25_25 : HAL.Bit;
   IRQTOPROC      : Boolean;
   Reserved_27_31 : HAL.UInt5;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

Reserved_0_7

OUTFROMPERI

OUTTOPAD

Reserved_10_11

OEFROMPERI

OETOPAD

Reserved_14_16

INFROMPAD

Reserved_18_18

INTOPERI

Reserved_20_23

IRQFROMPAD

Reserved_25_25

IRQTOPROC

Reserved_27_31

GPIO_QSPI_SS_CTRL_FUNCSEL_Field

type GPIO_QSPI_SS_CTRL_FUNCSEL_Field is
  (xip_ss_n,
   sio_31,
   null_k)
  with Size => 5;

Enumeration Literal

xip_ss_n

sio_31

null_k

GPIO_QSPI_SS_CTRL_INOVER_Field

type GPIO_QSPI_SS_CTRL_INOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the peri input

INVERT

drive peri input low

LOW

drive peri input high

HIGH

GPIO_QSPI_SS_CTRL_IRQOVER_Field

type GPIO_QSPI_SS_CTRL_IRQOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

invert the interrupt

INVERT

drive interrupt low

LOW

drive interrupt high

HIGH

GPIO_QSPI_SS_CTRL_OEOVER_Field

type GPIO_QSPI_SS_CTRL_OEOVER_Field is
   NORMAL,
   INVERT,
   DISABLE,
   ENABLE)
  with Size => 2;

Enumeration Literal

NORMAL

drive output enable from inverse of peripheral signal selected by funcsel

INVERT

disable output

DISABLE

enable output

ENABLE

GPIO_QSPI_SS_CTRL_OUTOVER_Field

type GPIO_QSPI_SS_CTRL_OUTOVER_Field is
   NORMAL,
   INVERT,
   LOW,
   HIGH)
  with Size => 2;

Enumeration Literal

NORMAL

drive output from inverse of peripheral signal selected by funcsel

INVERT

drive output low

LOW

drive output high

HIGH

GPIO_QSPI_SS_CTRL_Register

type GPIO_QSPI_SS_CTRL_Register is record
   FUNCSEL        : GPIO_QSPI_SS_CTRL_FUNCSEL_Field :=
                     RP2040_SVD.IO_QSPI.null_k;
   Reserved_5_7   : HAL.UInt3 := 16#0#;
   OUTOVER        : GPIO_QSPI_SS_CTRL_OUTOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_10_11 : HAL.UInt2 := 16#0#;
   OEOVER         : GPIO_QSPI_SS_CTRL_OEOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_14_15 : HAL.UInt2 := 16#0#;
   INOVER         : GPIO_QSPI_SS_CTRL_INOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_18_27 : HAL.UInt10 := 16#0#;
   IRQOVER        : GPIO_QSPI_SS_CTRL_IRQOVER_Field :=
                     RP2040_SVD.IO_QSPI.NORMAL;
   Reserved_30_31 : HAL.UInt2 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

FUNCSEL

Reserved_5_7

OUTOVER

Reserved_10_11

OEOVER

Reserved_14_15

INOVER

Reserved_18_27

IRQOVER

Reserved_30_31

GPIO_QSPI_SS_STATUS_Register

type GPIO_QSPI_SS_STATUS_Register is record
   Reserved_0_7   : HAL.UInt8;
   OUTFROMPERI    : Boolean;
   OUTTOPAD       : Boolean;
   Reserved_10_11 : HAL.UInt2;
   OEFROMPERI     : Boolean;
   OETOPAD        : Boolean;
   Reserved_14_16 : HAL.UInt3;
   INFROMPAD      : Boolean;
   Reserved_18_18 : HAL.Bit;
   INTOPERI       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   IRQFROMPAD     : Boolean;
   Reserved_25_25 : HAL.Bit;
   IRQTOPROC      : Boolean;
   Reserved_27_31 : HAL.UInt5;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

Reserved_0_7

OUTFROMPERI

OUTTOPAD

Reserved_10_11

OEFROMPERI

OETOPAD

Reserved_14_16

INFROMPAD

Reserved_18_18

INTOPERI

Reserved_20_23

IRQFROMPAD

Reserved_25_25

IRQTOPROC

Reserved_27_31

INTR_Register

type INTR_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

IO_QSPI_Periph

IO_QSPI_Periph : aliased IO_QSPI_Peripheral
  with Import, Address => IO_QSPI_Base;

IO_QSPI_Peripheral

type IO_QSPI_Peripheral is record
   GPIO_QSPI_SCLK_STATUS : aliased GPIO_QSPI_SCLK_STATUS_Register;
   GPIO_QSPI_SCLK_CTRL   : aliased GPIO_QSPI_SCLK_CTRL_Register;
   GPIO_QSPI_SS_STATUS   : aliased GPIO_QSPI_SS_STATUS_Register;
   GPIO_QSPI_SS_CTRL     : aliased GPIO_QSPI_SS_CTRL_Register;
   GPIO_QSPI_SD0_STATUS  : aliased GPIO_QSPI_SD0_STATUS_Register;
   GPIO_QSPI_SD0_CTRL    : aliased GPIO_QSPI_SD0_CTRL_Register;
   GPIO_QSPI_SD1_STATUS  : aliased GPIO_QSPI_SD1_STATUS_Register;
   GPIO_QSPI_SD1_CTRL    : aliased GPIO_QSPI_SD1_CTRL_Register;
   GPIO_QSPI_SD2_STATUS  : aliased GPIO_QSPI_SD2_STATUS_Register;
   GPIO_QSPI_SD2_CTRL    : aliased GPIO_QSPI_SD2_CTRL_Register;
   GPIO_QSPI_SD3_STATUS  : aliased GPIO_QSPI_SD3_STATUS_Register;
   GPIO_QSPI_SD3_CTRL    : aliased GPIO_QSPI_SD3_CTRL_Register;
   INTR                  : aliased INTR_Register;
   PROC0_INTE            : aliased PROC0_INTE_Register;
   PROC0_INTF            : aliased PROC0_INTF_Register;
   PROC0_INTS            : aliased PROC0_INTS_Register;
   PROC1_INTE            : aliased PROC1_INTE_Register;
   PROC1_INTF            : aliased PROC1_INTF_Register;
   PROC1_INTS            : aliased PROC1_INTS_Register;
   DORMANT_WAKE_INTE     : aliased DORMANT_WAKE_INTE_Register;
   DORMANT_WAKE_INTF     : aliased DORMANT_WAKE_INTF_Register;
   DORMANT_WAKE_INTS     : aliased DORMANT_WAKE_INTS_Register;
end record
  with Volatile;

Record fields

GPIO_QSPI_SCLK_STATUS

GPIO_QSPI_SCLK_CTRL

GPIO_QSPI_SS_STATUS

GPIO_QSPI_SS_CTRL

GPIO_QSPI_SD0_STATUS

GPIO_QSPI_SD0_CTRL

GPIO_QSPI_SD1_STATUS

GPIO_QSPI_SD1_CTRL

GPIO_QSPI_SD2_STATUS

GPIO_QSPI_SD2_CTRL

GPIO_QSPI_SD3_STATUS

GPIO_QSPI_SD3_CTRL

INTR

PROC0_INTE

PROC0_INTF

PROC0_INTS

PROC1_INTE

PROC1_INTF

PROC1_INTS

DORMANT_WAKE_INTE

DORMANT_WAKE_INTF

DORMANT_WAKE_INTS

PROC0_INTE_Register

type PROC0_INTE_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

PROC0_INTF_Register

type PROC0_INTF_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

PROC0_INTS_Register

type PROC0_INTS_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean;
   Reserved_24_31            : HAL.UInt8;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

PROC1_INTE_Register

type PROC1_INTE_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

PROC1_INTF_Register

type PROC1_INTF_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean := False;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean := False;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean := False;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean := False;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean := False;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean := False;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean := False;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean := False;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean := False;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean := False;
   Reserved_24_31            : HAL.UInt8 := 16#0#;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31

PROC1_INTS_Register

type PROC1_INTS_Register is record
   GPIO_QSPI_SCLK_LEVEL_LOW  : Boolean;
   GPIO_QSPI_SCLK_LEVEL_HIGH : Boolean;
   GPIO_QSPI_SCLK_EDGE_LOW   : Boolean;
   GPIO_QSPI_SCLK_EDGE_HIGH  : Boolean;
   GPIO_QSPI_SS_LEVEL_LOW    : Boolean;
   GPIO_QSPI_SS_LEVEL_HIGH   : Boolean;
   GPIO_QSPI_SS_EDGE_LOW     : Boolean;
   GPIO_QSPI_SS_EDGE_HIGH    : Boolean;
   GPIO_QSPI_SD0_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD0_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD0_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD0_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD1_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD1_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD1_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD1_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD2_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD2_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD2_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD2_EDGE_HIGH   : Boolean;
   GPIO_QSPI_SD3_LEVEL_LOW   : Boolean;
   GPIO_QSPI_SD3_LEVEL_HIGH  : Boolean;
   GPIO_QSPI_SD3_EDGE_LOW    : Boolean;
   GPIO_QSPI_SD3_EDGE_HIGH   : Boolean;
   Reserved_24_31            : HAL.UInt8;
end record
  with Volatile_Full_Access, Object_Size => 32,
       Bit_Order => System.Low_Order_First;

Record fields

GPIO_QSPI_SCLK_LEVEL_LOW

GPIO_QSPI_SCLK_LEVEL_HIGH

GPIO_QSPI_SCLK_EDGE_LOW

GPIO_QSPI_SCLK_EDGE_HIGH

GPIO_QSPI_SS_LEVEL_LOW

GPIO_QSPI_SS_LEVEL_HIGH

GPIO_QSPI_SS_EDGE_LOW

GPIO_QSPI_SS_EDGE_HIGH

GPIO_QSPI_SD0_LEVEL_LOW

GPIO_QSPI_SD0_LEVEL_HIGH

GPIO_QSPI_SD0_EDGE_LOW

GPIO_QSPI_SD0_EDGE_HIGH

GPIO_QSPI_SD1_LEVEL_LOW

GPIO_QSPI_SD1_LEVEL_HIGH

GPIO_QSPI_SD1_EDGE_LOW

GPIO_QSPI_SD1_EDGE_HIGH

GPIO_QSPI_SD2_LEVEL_LOW

GPIO_QSPI_SD2_LEVEL_HIGH

GPIO_QSPI_SD2_EDGE_LOW

GPIO_QSPI_SD2_EDGE_HIGH

GPIO_QSPI_SD3_LEVEL_LOW

GPIO_QSPI_SD3_LEVEL_HIGH

GPIO_QSPI_SD3_EDGE_LOW

GPIO_QSPI_SD3_EDGE_HIGH

Reserved_24_31