------------- Registers -- -------------
type DCRSR_HALTED_Field is
  (
   Register_0,
   Register_1,
   Register_2,
   Register_3,
   Register_4,
   Register_5,
   Register_6,
   Register_7,
   Register_8,
   Register_9,
   Register_10,
   Register_11,
   Register_12,
   Current_Sp,
   Link_Rregister,
   Debug_Return_Address,
   XPsr,
   Msp,
   Psp,
   Control_Faultmask_Basepri_Primask)
  with Size => 5;
type DCRSR_Register is record
   HALTED         : DCRSR_HALTED_Field := Cortex_M_SVD.Debug.Register_0;
   Reserved_5_15  : HAL.UInt11 := 16#0#;
   REGWnR         : DCRSR_REGWnR_Field := Cortex_M_SVD.Debug.Read;
   Reserved_17_31 : HAL.UInt15 := 16#0#;
end record
  with Volatile_Full_Access, Size => 32,
       Bit_Order => System.Low_Order_First;
type DCRSR_REGWnR_Field is
  (
   Read,
   Write)
  with Size => 1;
Debug_Periph : aliased Debug_Peripheral
  with Import, Address => Debug_Base;
type Debug_Peripheral is record
   DFSR  : aliased DFSR_Register;
   DHCSR : aliased DHCSR_Cluster;
   DCRSR : aliased DCRSR_Register;
   DCRDR : aliased HAL.UInt32;
   DEMCR : aliased DEMCR_Register;
end record
  with Volatile;
type DEMCR_Register is record
   VC_CORERESET   : Boolean := False;
   Reserved_1_3   : HAL.UInt3 := 16#0#;
   VC_MMERR       : Boolean := False;
   VC_NOCPERR     : Boolean := False;
   VC_CHKERR      : Boolean := False;
   VC_STATERR     : Boolean := False;
   VC_BUSERR      : Boolean := False;
   VC_INTERR      : Boolean := False;
   VC_HARDERR     : Boolean := False;
   Reserved_11_15 : HAL.UInt5 := 16#0#;
   MON_EN         : Boolean := False;
   MON_PEND       : Boolean := False;
   MON_STEP       : Boolean := False;
   MON_REQ        : Boolean := False;
   Reserved_20_23 : HAL.UInt4 := 16#0#;
   TRCENA         : Boolean := False;
   Reserved_25_31 : HAL.UInt7 := 16#0#;
end record
  with Volatile_Full_Access, Size => 32,
       Bit_Order => System.Low_Order_First;
type DFSR_Register is record
   HALTED        : Boolean := False;
   BKPT          : Boolean := False;
   DWTTRAP       : Boolean := False;
   VCATCH        : Boolean := False;
   EXTERNAL      : Boolean := False;
   Reserved_5_31 : HAL.UInt27 := 16#0#;
end record
  with Volatile_Full_Access, Size => 32,
       Bit_Order => System.Low_Order_First;
type DHCSR_Cluster
  (Discriminent : DHCSR_Disc := Mode_1)
is record
   case Discriminent is
      when Mode_1 =>
         Read : aliased Read_DHCSR_Register;
      when Mode_2 =>
         Write : aliased Write_DHCSR_Register;
   end case;
end record
  with Unchecked_Union, Volatile, Size => 32;
type DHCSR_Disc is
  (
   Mode_1,
   Mode_2);
type Read_DHCSR_Register is record
   C_DEBUGGEN     : Boolean;
   C_HALT         : Boolean;
   C_STEP         : Boolean;
   C_MASKINTS     : Boolean;
   Reserved_4_4   : HAL.Bit;
   C_SNAPSTALL    : Boolean;
   Reserved_6_15  : HAL.UInt10;
   S_REGRDY       : Boolean;
   S_HALT         : Boolean;
   S_SLEEP        : Boolean;
   S_LOCKUP       : Boolean;
   Reserved_20_23 : HAL.UInt4;
   S_RETIRE_ST    : Boolean;
   S_RESET_ST     : Boolean;
   Reserved_26_31 : HAL.UInt6;
end record
  with Volatile_Full_Access, Size => 32,
       Bit_Order => System.Low_Order_First;
type Write_DHCSR_Register is record
   C_DEBUGGEN    : Boolean := False;
   C_HALT        : Boolean := False;
   C_STEP        : Boolean := False;
   C_MASKINTS    : Boolean := False;
   Reserved_4_4  : HAL.Bit := 16#0#;
   C_SNAPSTALL   : Boolean := False;
   Reserved_6_15 : HAL.UInt10 := 16#0#;
   S_RESET_ST    : Write_DHCSR_S_RESET_ST_Field := 16#0#;
end record
  with Volatile_Full_Access, Size => 32,
       Bit_Order => System.Low_Order_First;
subtype Write_DHCSR_S_RESET_ST_Field is HAL.UInt16;