------------- Registers -- -------------
type AIRCR_ENDIANNESS_Field is
(
Little_Endian,
Big_Endian)
with Size => 1;
Data is big endian
type AIRCR_Register is record
Reserved_0_0 : HAL.Bit := 16#0#;
VECTCLRACTIVE : Boolean := False;
SYSRESETREQ : Boolean := False;
Reserved_3_14 : HAL.UInt12 := 16#0#;
ENDIANNESS : AIRCR_ENDIANNESS_Field :=
Cortex_M_SVD.SCB.Little_Endian;
VECTKEY : AIRCR_VECTKEY_Field := Cortex_M_SVD.SCB.Key_Read;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
type AIRCR_VECTKEY_Field is
(
Key,
Key_Read)
with Size => 16;
The read key
type CCR_Register is record
Reserved_0_2 : HAL.UInt3 := 16#0#;
UNALIGNED_TRP : Boolean := False;
Reserved_4_8 : HAL.UInt5 := 16#0#;
STKALIGN : Boolean := True;
Reserved_10_31 : HAL.UInt22 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
subtype CPUID_Constant_Field is HAL.UInt4;
type CPUID_Implementer_Field is
(
Arm)
with Size => 8;
type CPUID_PartNo_Field is
(
Cortex_M7)
with Size => 12;
type CPUID_Register is record
Revision : CPUID_Revision_Field;
PartNo : CPUID_PartNo_Field;
Constant_k : CPUID_Constant_Field;
Variant : CPUID_Variant_Field;
Implementer : CPUID_Implementer_Field;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
type CPUID_Revision_Field is
(
P0,
P1,
P2)
with Size => 4;
Patch 1
Patch 2
type CPUID_Variant_Field is
(
R0,
R1)
with Size => 4;
Revision 1
type ICSR_Register is record
VECTACTIVE : ICSR_VECTACTIVE_Field := 16#0#;
Reserved_6_11 : HAL.UInt6 := 16#0#;
VECTPENDING : ICSR_VECTPENDING_Field := 16#0#;
Reserved_18_21 : HAL.UInt4 := 16#0#;
ISRPENDING : Boolean := False;
Reserved_23_24 : HAL.UInt2 := 16#0#;
PENDSTCLR : Boolean := False;
PENDSTSET : Boolean := False;
PENDSVCLR : Boolean := False;
PENDSVSET : Boolean := False;
Reserved_29_30 : HAL.UInt2 := 16#0#;
NMIPENDSET : Boolean := False;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
subtype ICSR_VECTACTIVE_Field is HAL.UInt6;
subtype ICSR_VECTPENDING_Field is HAL.UInt6;
SCB_Periph : aliased SCB_Peripheral
with Import, Address => System'To_Address (16#E000ED00#);
type SCB_Peripheral is record
CPUID : aliased CPUID_Register;
ICSR : aliased ICSR_Register;
AIRCR : aliased AIRCR_Register;
SCR : aliased SCR_Register;
CCR : aliased CCR_Register;
SHPR2 : aliased SHPR2_Register;
SHPR3 : aliased SHPR3_Register;
end record
with Volatile;
type SCR_Register is record
Reserved_0_0 : HAL.Bit := 16#0#;
SLEEPONEXIT : Boolean := False;
SLEEPDEEP : Boolean := False;
Reserved_3_3 : HAL.Bit := 16#0#;
SEVONPEND : Boolean := False;
Reserved_5_31 : HAL.UInt27 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
subtype SHPR2_PRI_11_Field is HAL.UInt8;
type SHPR2_Register is record
Reserved_0_23 : HAL.UInt24 := 16#0#;
PRI_11 : SHPR2_PRI_11_Field := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
subtype SHPR3_PRI_14_Field is HAL.UInt8;
subtype SHPR3_PRI_15_Field is HAL.UInt8;
type SHPR3_Register is record
Reserved_0_15 : HAL.UInt16 := 16#0#;
PRI_14 : SHPR3_PRI_14_Field := 16#0#;
PRI_15 : SHPR3_PRI_15_Field := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;